1. Field of the Invention
The present invention relates to a method for forming the metal wiring of a semiconductor device, and more particularly to a method for forming the metal wiring of a highly integrated semiconductor device.
2. Description of the Prior Art
Generally, semiconductor devices have a wiring adapted to electrically connect associated elements to each other or to an external circuit. Such a wiring is formed by burying a wiring material in contact holes and via holes to form a wiring layer, and subsequently processing the wiring layer.
Where a low resistance is required, a metal wiring is typically used.
Such a metal wiring is made of an aluminum-based material containing a small amount of silicon or copper, or an aluminum alloy containing silicon and copper and exhibiting low specific resistance and superior workability. For the formation of such a metal wiring, a method wherein a wiring material is deposited in accordance with a sputtering method using a physical vapor deposition (PVD) process to bury contact holes and via holes has been widely used.
The recent high integration trend of semiconductor devices inevitably involves a reduction in the size of metal contacts along with an increase in topology. As a result, the step coverage of an anti-diffusion metal layer formed using a sputtering process becomes poor. This results in a degradation of the reliability of metal wirings. Such an anti-diffusion metal layer typically has a multilayer structure consisting of a Ti film and a TiN film. Since such Ti and TiN films have a columnar structure, they are formed using an O.sub.2 stuffing process.
In connection with this, a conventional method for forming a metal wiring of a semiconductor device will be described in conjunction with FIG. 1.
FIG. 1 is a sectional view illustrating the conventional metal wiring forming method.
In accordance with this method, a planarizing film 3 is first formed over a conductive layer 1 which may be a semiconductor substrate, as shown in FIG. 1.
Thereafter, the planarizing film 3 is selectively removed in accordance with an etch process using a metal wiring contact mask (not shown), thereby forming a contact hole 5. The semiconductor substrate 1 is partially exposed at a desired portion thereof through the contact hole 5.
A titanium film 7 and a titanium nitride film 9 are then sequentially formed over the resulting structure. The titanium nitride film 9 is then subjected to an O.sub.2 stuffing process. Thus, an anti-diffusion film is obtained which has a multilayer structure consisting of the titanium film 7 and titanium nitride film 9.
However, the conventional method has various problems. Specifically, the conventional method involves a degradation in the step coverage for semiconductor devices of an ultra-high integration. As a result, it is difficult to control the diffusion of O.sub.2 in the TiN thin film. This results in a degraded contact resistance caused by an over diffusion of O.sub.2 or a leakage of current caused by an insufficient diffusion of O.sub.2.
In order to solve such problems caused by the poor step coverage, the conventional method requires the use of a collimator process and a wide gap process. However, such processes reduce the productivity of semiconductor devices.